/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2021 Huawei Technologies Co., Ltd */

#ifndef HIUDK3_COMMON_H
#define HIUDK3_COMMON_H

#include <linux/types.h>

struct hinic3_dma_addr_align {
    u32 real_size;

    void *ori_vaddr;
    dma_addr_t ori_paddr;

    void *align_vaddr;
    dma_addr_t align_paddr;
};

int hiudk_dma_zalloc_coherent_align(
    void *udkdev, u64 size, u64 align, unsigned int flag, struct hinic3_dma_addr_align *mem_align);

void hiudk_dma_free_coherent_align(void *udkdev, struct hinic3_dma_addr_align *mem_align);

enum hinic3_wait_return {
    WAIT_PROCESS_CPL = 0,
    WAIT_PROCESS_WAITING = 1,
    WAIT_PROCESS_ERR = 2,
};

typedef enum hinic3_wait_return (*wait_cpl_handler)(void *priv_data);

struct hiudk_com_ops {
    void (*hiudk_dma_free_coherent_align)(void *dev_hdl, struct hinic3_dma_addr_align *mem_align);
    int (*hiudk_dma_zalloc_coherent_align)(
        void *dev_hdl, u64 size, u64 align, unsigned int flag, struct hinic3_dma_addr_align *mem_align);
};

#endif
